Parallel computing is about to hit the mass market, replacing the traditional sequential computer. This change is caused by a major shift in technology, the introduction of heterogeneous computers equipped with both a multi-core CPU and data-stream accele rators. Such accelerators might come in the form of programmable graphics cards (GPUs) or embedded on the processor itself, like in the Cell BE processor. Heterogeneous computers have the potential for huge increases in performance, but mandate new progra mming paradigms.
Most computer programs existing today are programmed according to a sequential paradigm. Until a few years ago, commodity computers were almost solely based on single-core CPUs, and the steady growth in CPU frequency automatically increa sed the performance of sequential programs. In the last years, this growth has slowed down, and the trend is for computers to increase the number of cores at the expense of clock frequency. Hence, the performance of sequential programs does not increase a s fast as before and parallelization is necessary to effectively utilize new CPUs.
Data-stream accelerators are computational units that allow a series of compute-intensive operations to be applied to a set of data. These units are not as flexible as tra ditional cores, and they need to be controlled by a general-purpose core (like a traditional CPU). When properly controlled, data-stream accelerators easily give a tenfold increase in performance compared with multi-core CPUs for large data sets.
In this strategic project we aim to sustain a position in the forefront of this emerging and rapid evolving technology, and address computational challenges from scientific and industrial application areas where we have deep knowledge and long experience. The re search of the project is grouped into three work packages:
-WP1: Heterogeneous computing
-WP2: Partial differential equations
-WP3: Geometry processing
SIP-NHD-Strategiske instituttprogram finansiert av NHD