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IKTPLUSS-IKT og digital innovasjon

Balancing Compute and Memory Performance in Reconfigurable Accelerators with Analytical Modeling

Alternative title: Balansert beregningsytelse og minneytelse i rekonfigurerbare akseleratorer

Awarded: NOK 7.7 mill.

The exponential growth of computer performance over the last four decades has been a result of continuous improvements in production technology. Dennard scaling -- which describes how transistor dimensions and voltages should be scaled across technology generations to create smaller transistors that consume less power -- has been critical to enable these improvements. By applying Dennard scaling, the number of transistors double with each technology generation while power consumption remains constant. In this sense, Dennard scaling can be seen as an enabler of the performance trend known as Moore's Law. Unfortunately, it is no longer possible to apply Dennard scaling across technology generations -- as reducing the transistor threshold voltage further exponentially increases static power consumption. At the same time, we have already reached the power dissipation that a practical cooling system can handle. Thus, high-performance computers have become power-limited, and leveraging parallelism, for instance in the form of power-efficient accelerators, is necessary to further improve their performance -- a critical requirement across important domains such as climate modeling, personalized medicine, materials science, chemistry, nanotechnology, automotive, and energy. In BAMPAM, we will improve the power-efficiency of tightly integrated reconfigurable accelerators by formulating analytical performance models that enable automatically generating accelerator instances with balanced compute and memory performance. A balanced accelerator activates exactly the number of compute units the memory configuration can support -- to ensure high performance -- while disabling remaining units -- to save power.

BAMPAM will improve the power-efficiency of tightly integrated reconfigurable accelerators by formulating analytical performance models that enable automatically generating accelerator instances with balanced compute and memory performance. Current high-performance computers are power-limited, and leveraging parallelism, for instance in the form of power-efficient accelerators, is necessary to further improve their performance -- a critical requirement across important domains such as climate modeling, personalized medicine, materials science, chemistry, nanotechnology, automotive and energy. In BAMPAM, we focus on processors with tightly coupled reconfigurable accelerators. These accelerators consist of a grid of compute units that can be configured to create specialized hardware for performance-critical application code regions. Accelerator imbalance is caused by activating more compute units than the system's memory configuration can support and results in poor power-efficiency because compute units needlessly dissipate power while waiting for memory. A balanced accelerator activates exactly the number of compute units the memory configuration can support - to ensure high performance - while disabling remaining units - to save power. The key research challenge is to devise approaches that automatically determine the number of compute units that achieve balance for different applications. We propose to overcome this challenge by formulating and validating analytical performance models that enable identifying the point of balance based on key application characteristics. These models will enable us to investigate model-based approaches for automatically generating balanced application-specific accelerator instances and thereby discover novel accelerator architectures or novel accelerator generation algorithms.

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IKTPLUSS-IKT og digital innovasjon